Daisy-chain Triggering
Trigger distribution, even minor differences in cable length can cause unwanted timing discrepancies, resulting in trigger misalignment. Additionally, in high-channel count systems with many digitizers, the driving capability—or fan-out—of the common/shared trigger source is often limited. As more digitizers are added to the system, this attenuates the trigger signal level beyond the digitizer's sensitivity, causing the digitizer to miss the trigger event. These challenges limit the achievable channel count, which we address using our daisy-chain solution.
With daisy-chain triggering, only a single primary digitizer receives the external trigger. The system then propagates the trigger signal as a digital signal to the other digitizers. This approach addresses the fan-out issue and ensures very accurate trigger timing precision, better than 50 picoseconds in large systems. Daisy-chain triggering is supported by selected digitizer models and can be used with all form factors, including PCIe. An additional advantage for PXIe systems is that the clock reference and synchronization signals can be distributed through the backplane of the chassis, minimizing the use of cables.
Figure 3. Daisy-chain block diagram for PCIe (left) utilizing the TRIG, SYNC, and CLK front-panel connectors. PXIe daisy-chain example (right) utilizing the backplane.
The easiest way of evaluating the daisy-chain functionality is to use theDigitizer Studio software. Please watch the video below to learn more.