Wavenumber and k-clock

The swept-source laser wavelength is incremented or decremented within each A-scan. For example, the wavelength may change from 1010 nm to 1110 nm in 4096 steps. The step size is non-linear and increase (or decrease) with wavelength. A specific wavelength is identified by its so-called wavenumber, denoted k, and many lasers offer an output signal called k-clock or k-trigger. This clock is often created using a Mach-Zehnder interferometer (MZI) and is utilized by the digitizer to acquire one sample for each wavelength. Due to its non-linear nature, the k-clock frequency varies during the A-scan and can for example span frequencies from 400 to 600 MHz.

Direct clocking versus k-clock remapping

Some SS-OCT systems utilize the k-clock as an external clock to the digitizer, however, this approach has many disadvantages:

• Analog-to-digital converters (ADCs) in high-performance digitizers require high-quality clock sources with very low jitter. The k-clock does not fulfill these requirements, and therefore ADC analog performance is degraded.
• The k-clock can exhibit noise or spikes and is sometimes even turned off completely during parts of the scan.
• The sample-and-hold circuit inside the ADCs is designed for using a clock with a constant duty cycle. Varying duty cycles may lead to bad ADC output samples or even occasional data loss.
• Direct clocking is only possible with older-generation ADCs that utilize parallel data interfaces such as Low Voltage Differential Signaling (LVDS). Such ADCs only support limited sampling rates and therefore limit achievable A-scan rates.
  
  

The k-clock is nonuniform with varying frequency.

K-clock remapping or resampling is a computational method used to extract the desired SS-OCT samples. The remapping typically includes interpolation that helps estimate the OCT input amplitude at K-clock zero-crossing instances. Interpolation and estimation are performed in real-time inside the digitizer’s onboard FPGA. This principle is illustrated in the figure below.​​​

Teledyne SP Devices’ real-time k-space remapping firmware, FWOCT, is currently available for evaluation by selected customers. More information will be made available soon, meanwhile please contact your local sales representative for additional information and/or to request evaluation.​​

Resul​ts using ADQ32 with FWOC

• A-scan rate = 200 kHz
• K-clock frequency is 900 MHz max
• SS-OCT signal frequency is 900 MHz max​
  
• K-space re-mapping performed in FPGA with FWOCT​
  
• The rising edges of the k-clock are used to sample the OCT signal
• Image processing performed in GPU using Vortex OCT library
• The averaged cross-section is an average of 500 B-scans​​​
  

I​mprovements when using interpolation by 1.5 times​

• K-space re-mapping performed in FPGA with FWOCT using 1.5x k-clock interpolation
  
• K-clock interpolation increases the number of OCT sampling points therby enabling deeper penetration. The longer the FFT, the deeper the image
• The k-clock interpolation factor was set to 1.5x which results in 1.5 remapped OCT sample points per k-clock period
• Interpolation increases the number of OCT signal sample points. This increases the frequency content of the sampled data which increases image depth​