Description​ ​

Our FWOCT firmware introduces substantial enhancements in k-space remapping, refining signal processing workflows and outputs for Swept-Source Optical Coherence Tomography (SS-OCT) devices. FWOCT's core functionality lies in the k-space remapping of OCT signals within the FPGA.

FWOCT enables the use of advanced analog-to-digital converters (ADCs) within digitizers. In SS-OCT applications, the k-clock establishes a non-uniform time base, while modern ADCs require a stable time base for consistent and reliable operation. To address this, FWOCT treats the k-clock and OCT signal as separate analog channels. By implementing sophisticated digital signal processing techniques, FWOCT optimizes ADC performance. This approach ensures that the ADC operates under optimal conditions, thereby improving signal quality. The fundamental principle of FWOCT is to translate the ADC's uniform time base to the k-clock's non-uniform time base in SS-OCT applications.

FWOCT supports three operational modes, providing significant flexibility in system architecture:

  • The k-clock/MZI can be adjusted across a wide range for example (4 - 2000 MHz for ADQ35).
  • The k-clock can operate at full rate or at a reduced frequency to lower cost and complexity.
  • OCT signal frequencies from 0 Hz up to 2 GHz are supported.​


Hardware options Resolution [b​its] Channels & Sampling rate [GSPS]​​​​ A-/B-scan trigger rate max [kHz] ​K-clock range [MHz]​ OCT Signal Range [MHz]​ FFT Size ​[bins]
Background Correction Dispersion Compensation & Windowing Output format (Absolute square or logarithmic) Streaming Rate to GPU/CPU [Gbyte/s]​
ADQ32 12 2 x 2.5​
488
4 to 1000
0 to 1000
​8​​​​​​k
​16-bit. 8k​​​​​​
​16-bit. 8k​​​​​​
​16-bit​​​​​​
7
ADQ33​​ ​12 2 x 1 488
1.6 to 400​​
​0 to 400
8​k ​​ ​16-bit. 8k​​​​​​
​16-bit. 8k​​​​​​
​16-bit​​​​​​
7​​​​​​
AD​​Q35
12 ​2 x 5 488
4 to 2000​ 0 to 2000
32k​​​ ​16-bit. 32k​​​​​​
​16-bit. 32k​​​​​​​​​​​​
​16-bit
​14​​​​​​
ADQ36
12 4 x 2.5
488
4 to 1000
0 to 1000
​8k​​​​
​16-bit. 8k​​​​​​
​16-bit. 8k​​​​​​​
​16-bit​
7​
​​​​​

Feature Direct clocking K-space remapping
Signal connection SS-OCT signal connected to digitizer analog input Ain1. SS-OCT signal connected to digitizer input Ain1.
K-clock connection Laser k-clock is used to clock the digitizer directly
Laser k-clock connected to digitizer input Ain2.
Clock frequency limitations Limits maximum usable k-clock frequency (800 MHz – 1 GHz). Enables use of higher k-clock frequencies.
Clock source stability The laser k-clock is not a stable clock source (some sources output very narrow glitches, others turn off during part of the scan). The ADC is clocked with a precision fixed-​​frequency clock source. ​
​​​
Compatibility Works only with older generation ADCs. Works with latest ADCs. ​
ADC design ADCs are not designed to handle a variable clock frequency, leading to bad samples and data loss. The interference signal is sampled in​ t-space using a constant clock, then re-sampled in the FPGA for linear k-space. 
Data integrity Leads to bad samples and data loss. Robust solution with no lost data or need to ignore the k-clock when k-space remapping is used. ​
Data capture Competitor ‘Ignore Bad Clock’ technology can ignore the k-clock signal for a user-specified time, leading to data loss during that period. No equivalent workaround needed due to robust k-space re-mapping. ​​The k-clock is continuously sampled, and every data point from the interference signal is captured.

K-clock limitation Limited by k-clock frequency variability. K-clock is only limited by ADC sample rate (40%). 
Image resolution and capture time Limited by the clock frequency and stability. Enables better image resolution and faster image capture time.​


Feature Rising k-clock edge Rising & falling k-clock edge K-clock with interpolation
K-clock frequency range

4 MHz to 40% of FS*
ADQ32 (up to 1 GHz)
ADQ35 (up to 2 GHz)
4 MHz to 40% of FS*
ADQ32 (up to 1 GHz)
ADQ35 (up to 2 GHz)
4 MHz to 40% of FS*
ADQ32 (up to 1 GHz)
ADQ35 (up to 2 GHz)
OCT frequency range
0 Hz to K-clock freq/2
(0 Hz to 1 GHz: ADQ35)
0 Hz to K-clock freq 
(0 Hz to 2 GHz: ADQ35)
0 Hz to K-clock freq 
(0 Hz to 2GHz: ADQ35)​​

*FS = digitizer sampling frequency, for example ADQ32 = 2.5GHz. ​​​​​​​​​​​​​​


Mode 1 - OCT signal remapping on k-clock rising edge (zero-crossing points)

  • Supports k-clock up to 40% of sampling rate and OCT signal frequency up to 50% of k-clock frequency
  • Example: ADQ32 with FS = 2.5 GHz, k-clock max 1 GHz, OCT signal max 500 MHz

Mode 2 - OCT signal remapping on k-clock rising and falling edge

  • Can be used to either reduce k-clock frequency by half or double the OCT signal frequency
  • Supports k-clock up to 40% of sampling rate and OCT signal frequency up to 100% of k-clock frequency
  • Example 1: ADQ32 with FS = 2.5 GHz, k-clock max 1 GHz, OCT signal max 1 GHz
  • Example 2: ADQ35/36 with FS = 5 GHz, k-clock max 2 GHz, OCT signal max 2 GHz

Mode 3Supports higher interpolation to extract sample points at sub-harmonic instants (e.g. 0, π/2, π, 3π/2, 2π)

  • Software-programmable remapping point instants
  • Supports using lower k-clock/MZI clock frequencies

Feature Implementation Comment

Background correction: Subtraction of a u​nique value for each sample point.

16-bit values. The number of values is the same as the number of FFT points.
A known background pattern can be removed from the collected signal before the FFT. This is done by writing a unique real-valued constant for each input index.
Windowing and dispersion compensation: Multiplication with a unique complex value for each sample point.
The real and imaginary part of each value are 16 bits each (2 integer bits and 14 fractional bits). The number of values is the same as the number of FFT points. The collected signal can be windowed and dispersion-compensated before the FFT. This is done by writing a unique complex-value constant for each input index.
FFT
8k points (ADQ32/33/36). 32K points (ADQ35).
​An FFT core exists on the FPGA.
Magnitude function: Takes the FFT output and provides the squared absolute value or the logarithmic value. Three output modes exist:
Passthrough 
squared absolute: Re(x)2 + Im(x)2
10*log10(squared absolute)
Passthrough: The output remains unchanged and is simply the complex-valued FFT output. Squared Magnitude: The output is |x| 2​. Logarithmic Scale: The output is 10 log10(|x2​).

Product ​Comment​
ADQ32 Order code ADQ32-FWOCT
ADQ33​ ​​ Order code ADQ33-FWOCT
ADQ35​ ​​ Order code ADQ33-FWOCT
ADQ36​​​ Order code ADQ36-FWOCT​